Nanoimprint lithography

is a revolutionary technique that promises to slash the manufacturing costs of semiconductors and data storage. Conventionally, designs are transferred to microchips using projected light ("photolithography"); in nanoimprint, the design is mechanically stamped on to the chip. Nanoimprint tools cost between $0.5M and $10M, compared with at least $40M for photolithography systems. As the required feature-sizes in microelectronic products continue to shrink, the potential cost advantage of nanoimprint will grow further.

In nanoimprint lithography (NIL), a patterned stamp mechanically deforms a layer of polymeric material, transferring a design to a product. To be adopted in the highly prized but defect-intolerant applications of solid-state memory and microprocessor manufacturing, nanoimprint needs to address its inherent, systematic pattern dependencies. Stamps with large or very varied feature sizes/densities exhibit elastic deflections during imprinting, causing damaging critical-dimension variation. 

Device designers need reassurance that any new pattern can be replicated with available apparatus. Conventionally, process development has been experimental and iterative, with engineers spending weeks in the lab and taking a substantial risk that the design itself will need to be changed requiring a new stamp, at a cost of many $10,000s.